Organic light emitting diode display

ABSTRACT

An exemplary embodiment provides an organic light emitting diode display including a substrate, a bridge electrode disposed on the substrate, a buffer layer which covers the bridge electrode, a semiconductor layer disposed on the buffer layer, a first gate insulating layer which covers the semiconductor layer in a plan view, a first gate conductor disposed on the first gate insulating layer and which includes a first gate electrode, a second gate insulating layer which covers the first gate conductor, a second gate conductor disposed on the second gate insulating layer, an interlayer-insulating layer which covers the second gate conductor, and a data line disposed on the interlayer-insulating layer. The first gate electrode is directly connected to the bridge electrode, the semiconductor layer is electrically connected to the bridge electrode, and a capacitance exists between the data line and the bridge electrode.

CROSS-REFERENCE TO RELATED APPLICATION

This application is a divisional of U.S. patent application Ser. No.16/689,860, filed on Nov. 20, 2019, which claims priority to KoreanPatent Application No. 10-2018-0144609, filed on Nov. 21, 2018, and allthe benefits accruing therefrom under 35 U.S.C. § 119, the content ofwhich in its entirety is herein incorporated by reference.

BACKGROUND (a) Technical Field

The present disclosure relates to an organic light emitting diodedisplay.

(b) Description of the Related Art

An Organic light emitting diode (“OLED”) display has received muchattention as a display device for displaying images.

The OLED display has a self-emission characteristic, eliminating thenecessity for a light source, unlike a liquid crystal display (“LCD”)device, and thus can be fabricated to be thinner and lighter. Further,the OLED display has high quality characteristics such as low powerconsumption, high luminance, high response speed, and the like.

In general, the OLED display includes a substrate, a plurality oftransistors disposed on the substrate, a plurality of insulating layersdisposed between wires constituting the transistors, and light emittingelements connected to the transistors.

In many cases, the OLED display includes many components included in onepixel as compared with a liquid crystal display device, and wires areconcentrated in a pixel area of a small size as more devices requirehigh resolution.

SUMMARY

Exemplary embodiments have been made in an effort to provide an organiclight emitting display in which cross-talk generated between a data lineand a driving connector adjacent thereto is reduced.

An exemplary embodiment provides an organic light emitting diode displayincluding a substrate, a bridge electrode disposed on the substrate, abuffer layer which covers the bridge electrode, a semiconductor layerdisposed on the buffer layer, a first gate insulating layer which coversthe semiconductor layer, a first gate conductor disposed on the firstgate insulating layer and which includes a first gate electrode, asecond gate insulating layer which covers the first gate conductor, asecond gate conductor disposed on the second gate insulating layer, aninterlayer-insulating layer which covers the second gate conductor, anda data line disposed on the interlayer-insulating layer, where the firstgate electrode is physically connected to the bridge electrode, thesemiconductor layer is electrically connected to the bridge electrode,and a capacitance exists between the data line and the bridge electrode.

In an exemplary embodiment, the semiconductor layer may include achannel region of the driving transistor and a drain region of a thirdtransistor, the channel region of the driving transistor may overlap thefirst gate electrode, and the drain region of the third transistor maybe electrically connected to the bridge electrode.

In an exemplary embodiment, the organic light emitting diode display mayfurther include a first gate connector disposed on a same layer as thefirst gate electrode.

In an exemplary embodiment, the first gate connector may be physicallyconnected to the bridge electrode through a first contact hole formed inthe first gate insulating layer and the buffer layer, and may bephysically connected to the semiconductor layer through a second contacthole formed in the first gate insulating layer.

In an exemplary embodiment, the second gate conductor may include astorage electrode, and the storage electrode may overlap the first gateelectrode with the second gate insulating layer interposed therebetweento constitute a storage capacitor.

In an exemplary embodiment, the organic light emitting diode display mayfurther include a driving connector disposed on a same layer as the dataline.

In an exemplary embodiment, the first gate connector may be physicallyconnected to the bridge electrode through a first contact hole formed inthe first gate insulating layer and the buffer layer, and may bephysically connected to the driving connector through a second contacthole formed in the second gate insulating layer and theinterlayer-insulating layer, and the driving connector may be physicallyconnected to the semiconductor layer through a third contact hole formedin the interlayer-insulating layer, the first gate insulating layer, andthe second gate insulating layer.

In an exemplary embodiment, the organic light emitting diode display mayfurther include a third gate insulating layer which covers the secondgate conductor, a third gate conductor disposed on the third gateinsulating layer, and a driving voltage line disposed on theinterlayer-insulating layer, and the driving voltage line may bedisposed to overlap the bridge electrode, and an interlayer-insulatinglayer covers the third gate conductor.

In an exemplary embodiment, the semiconductor layer may include achannel region of the driving transistor and a drain region of the thirdtransistor, the channel region of the driving transistor may overlap thefirst gate electrode, and the drain region of the third transistor maybe electrically connected to the bridge electrode.

In an exemplary embodiment, the second gate conductor may include astorage electrode, and the storage electrode may overlap the first gateelectrode with the second gate insulating layer interposed therebetweento constitute a storage capacitor.

In an exemplary embodiment, the organic light emitting diode display mayfurther include a lower gate connector disposed on a same layer as thefirst gate electrode.

In an exemplary embodiment, the lower gate connector may be physicallyconnected to the bridge electrode through a first contact hole formed inthe lower gate insulating layer and the buffer layer, and may bephysically connected to the semiconductor layer through a second contacthole formed in the first gate insulating layer.

In an exemplary embodiment, the organic light emitting diode display mayfurther include an upper gate connector disposed on a same layer as thethird gate conductor.

In an exemplary embodiment, the upper gate connector may be physicallyconnected to the semiconductor layer through a first contact hole formedin the first gate insulating layer, the second gate insulating layer,and the third gate insulating layer, and may be physically connected tothe bridge electrode through a second contact hole formed in the bufferlayer, the first gate insulating layer, the second gate insulatinglayer, and the third gate insulating layer.

In an exemplary embodiment, the organic light emitting diode display mayfurther include an upper gate connector disposed on a same layer as thethird gate conductor, and the lower gate connector may be physicallyconnected to the bridge electrodes through a first contact hole formedin in the buffer layer and the first gate insulating layer, and may bephysically connected to the upper gate connector through a secondcontact hole formed in the second gate insulating layer and the thirdgate insulating layer. The upper gate connector may be physicallyconnected to the semiconductor through a third contact hole formed inthe first gate insulating layer, the second gate insulating layer, andthe third gate insulating layer.

An exemplary embodiment provides an organic light emitting diode displayincluding a substrate, a scan line disposed on the substrate, a dataline disposed and which crosses the scan line, a driving voltage linedisposed in parallel with the data line and which overlaps a pluralityof transistors in a plan view, a driving transistor which has a firstgate electrode and a first electrode connected to the driving voltageline, an organic light emitting diode connected to the drivingtransistor, a second transistor connected to the scan line, the dataline, and the first electrode of the driving transistor, and a thirdtransistor which includes a third gate electrode connected to the scanline and a second electrode connected to the first gate electrode. Thefirst gate electrode of the driving transistor and the second electrodeof the third transistor are connected through a bridge electrode, andthe driving voltage line overlaps the bridge electrode in the plan view.

In an exemplary embodiment, the organic light emitting diode display mayfurther include a first storage electrode connected to the drivingvoltage line and a second storage electrode which includes the firstgate electrode, and the first storage electrode and the second storageelectrode may overlap each other in the plan view and constitute astorage capacitor.

In an exemplary embodiment, the organic light emitting diode display mayfurther include an upper gate connector which overlaps the bridgeelectrode and the second electrode of the third transistor in the planview, and the upper gate connector may be physically connected to thebridge electrode and the second electrode of the third transistorthrough a contact hole.

In an exemplary embodiment, the organic light emitting diode display mayfurther include a lower gate connector which overlaps the bridgeelectrode and the second electrode of the third transistor in the planview, and the lower gate connector may be physically connected to thebridge electrode and the second electrode of the third transistorthrough a contact hole.

In an exemplary embodiment, the driving voltage line may not beoverlapped with the bridge electrode in the plan view.

According to the exemplary embodiments, the gate electrode of the firsttransistor and the drain region of the third transistor may be connectedto each other using a bridge electrode instead of the driving connectoradjacent to the data line. In addition, the parasitic capacitanceexisting between the data line and the driving connector or the bridgeelectrode may be reduced by forming only a part of the driving connectorand using the bridge electrode. That is, it is possible to provide anorganic light emitting diode display in which crosstalk generatedbetween the data line and the neighboring driving connector or thebridge electrode is reduced.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates an equivalent circuit diagram of an exemplaryembodiment of one pixel of an organic light emitting diode displayaccording to the invention.

FIG. 2 illustrates a top plan view of an exemplary embodiment of a pixelarea of an organic light emitting diode display according to theinvention.

FIG. 3 illustrates a cross-sectional view taken along line of FIG. 2 .

FIG. 4 illustrates a cross-sectional view taken along line IV-IV′ ofFIG. 2 .

FIG. 5 illustrates a top plan view of another exemplary embodiment of apixel area of an organic light emitting diode display according to theinvention.

FIG. 6 illustrates a cross-sectional view taken along line VI-VI′ ofFIG. 5 .

FIG. 7 illustrates a top plan view of still another exemplary embodimentof a pixel area of an organic light emitting diode display according tothe invention.

FIG. 8 illustrates a cross-sectional view taken along line VIII-VIII′ ofFIG. 7 .

FIG. 9 illustrates a top plan view of still another exemplary embodimentof a pixel area of an organic light emitting diode display according tothe invention.

FIG. 10 illustrates a cross-sectional view taken along line X-X′ of FIG.9 .

FIG. 11 illustrates a top plan view of an exemplary embodiment of aregion including one pixel of an organic light emitting diode displayaccording to the invention.

FIG. 12 illustrates a cross-sectional view taken along line XII-XII′ ofFIG. 11 .

FIG. 13 illustrates a top plan view of another exemplary embodiment of aregion including one pixel of an organic light emitting diode displayaccording to the invention FIG. 14 illustrates a cross-sectional viewtaken along line XIV-XIV′ of FIG. 13 .

FIG. 15 illustrates a top plan view of still another exemplaryembodiment of a region including one pixel of an organic light emittingdiode display according to the invention.

FIG. 16 illustrates a cross-sectional view taken along line XVI-XVI′ ofFIG. 15 .

DETAILED DESCRIPTION

The invention will be described more fully hereinafter with reference tothe accompanying drawings, in which exemplary embodiments are shown. Asthose skilled in the art would realize, the described embodiments may bemodified in various different ways, all without departing from thespirit or scope of the invention.

To clearly describe the invention, parts that are irrelevant to thedescription are omitted, and like numerals refer to like or similarconstituent elements throughout the specification.

Further, since sizes and thicknesses of constituent members shown in theaccompanying drawings are arbitrarily given for better understanding andease of description, the invention is not limited to the illustratedsizes and thicknesses. In the drawings, the thicknesses of layers,films, panels, regions, etc., are exaggerated for clarity. In thedrawings, for better understanding and ease of description, thethicknesses of some layers and areas are exaggerated.

It will be understood that when an element such as a layer, film,region, or substrate is referred to as being “on” another element, itcan be directly on the other element or intervening elements may also bepresent. In contrast, when an element is referred to as being “directlyon” another element, there are no intervening elements present. Further,the word “over” or “on” means positioning on or below the objectportion, and does not necessarily mean positioning on the upper side ofthe object portion based on a gravity direction.

In addition, unless explicitly described to the contrary, the word“comprise” and variations such as “comprises” or “comprising” will beunderstood to imply the inclusion of stated elements but not theexclusion of any other elements.

Further, in the specification, the phrase “in a plan view” means when anobject portion is viewed from above, and the phrase “in across-sectional view” means when a cross-section taken by verticallycutting an object portion is viewed from the side.

It will be understood that, although the terms “first,” “second,”“third” etc. may be used herein to describe various elements,components, regions, layers and/or sections, these elements, components,regions, layers and/or sections should not be limited by these terms.These terms are only used to distinguish one element, component, region,layer or section from another element, component, region, layer orsection. Thus, “a first element,” “component,” “region,” “layer” or“section” discussed below could be termed a second element, component,region, layer or section without departing from the teachings herein.

The terminology used herein is for the purpose of describing particularembodiments only and is not intended to be limiting. As used herein, thesingular forms “a,” “an,” and “the” are intended to include the pluralforms, including “at least one,” unless the content clearly indicatesotherwise. “At least one” is not to be construed as limiting “a” or“an.” “Or” means “and/or.” As used herein, the term “and/or” includesany and all combinations of one or more of the associated listed items.

Hereinafter, an organic light emitting diode display according to anexemplary embodiment will be described with reference to FIG. 1 .

FIG. 1 illustrates an equivalent circuit diagram of an exemplaryembodiment of one pixel of an organic light emitting diode displayaccording to the invention.

FIG. 1 illustrates the organic light emitting diode display in which acrosstalk phenomenon is reduced as compared with a structure including adriving connector that is disposed on the same layer as a data line, byforming a bridge electrode 31 (see FIG. 2 to FIG. 16 ) for connecting adriving gate connector Q at a lower portion of a buffer layer or forminga driving connector at some regions. The main features will be describedin detail below with reference to FIG. 2 to FIG. 16 , and hereinafter, ageneral organic light emitting display will be described.

Referring to FIG. 1 , one pixel PX of the organic light emitting diodedisplay includes a plurality of transistors T1, T2, T3, T4, T5, T6, andT7 connected to a plurality of signal lines 127, 151, 152, 153, 158,171, 172, and 741, a storage capacitor Cst, and an organic lightemitting diode OLED.

The organic light emitting diode display includes a display area fordisplaying an image, and such pixels PX are arranged in various ways(e.g., a matrix) in the display area.

The transistors T1, T2, T3, T4, T5, T6, and T7 include a drivingtransistor T1 switching transistors (i.e., a second transistor T2 and athird transistor T3) connected with a scan line 151, and othertransistors (hereinafter referred to as “compensation transistors”) forperforming an operation required to operate the organic light emittingdiode OLED. These compensation transistors T4, T5, T6, and T7 mayinclude a fourth transistor T4, a fifth transistor T5, a sixthtransistor T6, and a seventh transistor T7. The plurality of signallines 127, 151, 152, 153, 158, 171, 172, and 741 may include the scanline 151, a previous-stage scan line 152, a light emission control line153, a bypass control line 158, a data line 171, a driving voltage line172, an initialization voltage line 127, and a common voltage line 741.The bypass control line 158 may be a portion of the previous-stage scanline 152, or may be electrically connected to the previous-stage scanline 152.

The scan line 151 is connected to a gate driver (not illustrated) totransfer a scan signal Sn to the second transistor T2 and the thirdtransistor T3. The previous-stage scan line 152 is connected to the gatedriver, and transfers a previous-stage scan signal S(n−1) to the fourthtransistor T4. The light emission control line 153 is connected to anemission controller (not illustrated), and transfers a light emissioncontrol signal EM to the fifth transistor T5 and the sixth transistor T6for controlling a light emission time of the organic light emittingdiode OLED. The bypass control line 158 transfers a bypass signal GB tothe seventh transistor T7.

The data line 171 is a wire for transferring a data voltage Dm generatedby a data driver (not illustrated), and a luminance of the organic lightemitting diode OLED (also referred to as “an organic light emittingelement”) that emits light varies depending on the data voltage Dm. Thedriving voltage line 172 applies a driving voltage ELVDD, theinitialization voltage line 127 transfers a initialization voltage Vintfor initializing the driving transistor T1, and the common voltage line741 applies a common voltage ELVSS. Constant voltages are respectivelyapplied to the driving voltage line 172, the initialization voltage line127, and the common voltage line 741.

First, the driving transistor T1 adjusts the magnitude of a drivingcurrent Id that is outputted depending on the data voltage Dm applied tothe driving transistor T1, and the driving current Id outputtedtherefrom is applied to the organic light emitting diode OLED so as toadjust the brightness of the organic light emitting diode OLED dependingon the data voltage Dm. For this purpose, a first electrode S1 of thedriving transistor T1 is disposed to receive the driving voltage ELVDD,and is connected to the driving voltage line 172 through the fifthtransistor T5. In addition, the first electrode S1 of the drivingtransistor T1 is also connected to a second electrode D2 of the secondtransistor T2 so that the data voltage Dm is also applied the firstelectrode S1. A second electrode D1 of the driving transistor T1, whichis one of output side electrodes, is disposed to output the drivingcurrent Id toward the organic light emitting electrode OLED, and isconnected to an anode of the organic light emitting diode OLED throughthe sixth transistor T6. A gate electrode G1 of the driving transistorT1 is connected to an electrode of the storage capacitor Cst, which is asecond storage electrode E2. Accordingly, a voltage of the gateelectrode G1 varies depending on a voltage stored in the storagecapacitor Cst, and thus the driving current Id outputted by the drivingtransistor T1 varies depending on the voltage stored in the storagecapacitor Cst.

The second transistor T2 accepts the data voltage Dm into the pixel PX.A gate electrode G2 of the second transistor T2 is connected to thefirst scan line 151, and a first electrode S2 of the second transistorT2 is connected to the data line 171. The second electrode D2 of thesecond transistor T2 is connected to the first electrode S1 of thedriving transistor T1. When the second transistor T2 is turned ondepending on the scan signal Sn transferred through the scan line 151,the data voltage Dm transferred through the data line 171 is transferredto the first electrode S1 of the driving transistor T1.

The third transistor T3 transfers a compensated voltage Dm+Vth to thesecond storage electrode E2 of the storage capacitor Cst. Here, thecompensated voltage Dm+Vth is a voltage applied to the gate electrode G1when the data voltage Dm is applied to the first electrode S1. Theamount of the compensated voltage Dm+Vth corresponds to the sum of thedata voltage Dm and the threshold voltage Vth of the driving transistorT1. A gate electrode G3 of the third transistor T3 is connected to thescan line 151, and a first electrode S3 of third transistor T3 isconnected to the second electrode D1 of the driving transistor T1. Asecond electrode D3 of the third transistor T3 is connected to thesecond storage electrode E2 of the storage capacitor Cst and the gateelectrode G1 of the driving transistor T1.

The third transistor T3 is turned on depending on the scan signal Sntransferred through the scan line 151 and connects the gate electrode G1and the second electrode D1 of the driving transistor T1 and connectsthe second electrode D1 of the driving transistor T1 and the secondstorage electrode E2 of the storage capacitor Cst when the thirdtransistor T3 is turned on.

The fourth transistor T4 initializes the gate electrode G1 of thedriving transistor T1 and the second storage electrode E2 of the storagecapacitor Cst. A gate electrode G4 is connected to the previous-stagescan line 152, and a first electrode S4 of the fourth transistor T4 isconnected to the initialization voltage line 127. A second electrode D4of the fourth transistor T4 is connected to the second storage electrodeE2 of the storage capacitor Cst and the gate electrode G1 of the drivingtransistor T1 via the second electrode D3 of the third transistor T3.The fourth transistor T4 transfers the initialization voltage Vint tothe gate electrode G1 of the driving transistor T1 and the secondstorage electrode E2 of the storage capacitor Cst depending on theprevious-stage scan signal S(n−1) transferred through the previous-stagescan line 152. Thus, the voltage of the gate electrode G1 of the drivingtransistor T1 and the second storage electrode E2 of the storagecapacitor Cst is initialized. The initialization voltage Vint may be avoltage that has a low voltage value to turn on the driving transistorT1.

The fifth transistor T5 transfers the driving voltage ELVDD to thedriving transistor T1. A gate electrode G5 of the fifth transistor T5 isconnected to the light emission control line 153, and a first electrodeS5 of the fifth transistor T5 is connected to the driving voltage line172. A second electrode D5 of the fifth transistor T5 is connected tothe first electrode S1 of the driving transistor T1.

The sixth transistor T6 transfers the driving current Id outputted fromthe driving transistor T1 to the organic light emitting diode OLED. Agate electrode G6 of the sixth transistor T6 is connected to the lightemission control line 153, and a first electrode S6 of the sixthtransistor T6 is connected to the second electrode D1 of the drivingtransistor T1. A second electrode D6 of the sixth transistor T6 isconnected to the anode of the light emitting diode OLED.

The fifth transistor T5 and the sixth transistor T6 are simultaneouslyturned on depending on the light emission control signal EM transferredthrough the light emission control line 153, and when the drivingvoltage ELVDD is applied to the first electrode S1 of the drivingtransistor T1 through the fifth transistor T5, the driving transistor T1outputs the driving current Id depending on the voltage of the gateelectrode G1 of the driving transistor T1 (i.e., the voltage of thesecond storage electrode E2 of the storage capacitor Cst). The outputteddriving current Id is transferred to the organic light emitting diodeOLED through the sixth transistor T6. The organic light emitting diodeOLED emits light as a current Ioled flows through the organic lightemitting diode OLED. A part of the driving current Id (i.e., bypasscurrent Ibp) flows to a second electrode D7 of the seventh transistor T7and the remaining current of the driving current Id (i.e., currentIoled) flows to the anode of the organic light emitting diode OLED.

The seventh transistor T7 initializes the anode of the organic lightemitting diode OLED. A gate electrode G7 of the seventh transistor T7 isconnected to the bypass control line 158, the second electrode D7 of theseventh transistor T7 is connected to the anode of the organic lightemitting diode OLED, and a first electrode S7 of the seventh transistorT7 is connected to the initialization voltage line 127. In an exemplaryembodiment, the bypass control line 158 may be connected to theprevious-stage scan line 152, and a signal having the same timing as thescan signal S(n−1) may be applied to the bypass control line 158 as abypass signal GB. In another exemplary embodiment, the bypass controlline 158 may not be connected to the previous-stage scan line 152, andmay transfer a separate signal (i.e., bypass signal GB) from theprevious-stage scan signal S(n−1). When the seventh transistor T7 turnson depending on the bypass signal GB, the initialization voltage Vint isapplied to the anode of the organic light emitting diode OLED and theorganic light emitting diode OLED is initialized.

A first storage electrode E1 of the storage capacitor Cst is connectedto the driving voltage line 172. The second storage electrode E2 isconnected to the gate electrode G1 of the driving transistor T1, thesecond electrode D3 of the third transistor T3, and the second electrodeD4 of the fourth transistor T4. As a result, the second storageelectrode E2 determines the voltage of the gate electrode G1 of thedriving transistor T1, and receives the data voltage Dm through thesecond electrode D3 of the third transistor T3 or the initializationvoltage Vint through the second electrode D4 of the fourth transistorT4.

Meanwhile, the anode of the organic light emitting diode OLED isconnected to the second electrode D6 of the sixth transistor T6 and thesecond electrode D7 of the seventh transistor T7, and the cathode isconnected to the common voltage line 741 which transfers the commonvoltage ELVSS.

In the exemplary embodiment of FIG. 1 , the pixel circuit includes seventransistors T1 to T7 and one capacitor Cst, but the invention is notlimited thereto. The numbers of the transistors and the capacitors andconnections therebetween may be variously modified.

Hereinafter, an operation of one pixel of an organic light emittingdiode display according to an exemplary embodiment will be describedwith reference to FIG. 1 .

The previous-stage scan signal S(n−1) of a low level is supplied to thepixel PX through the previous-stage scan line 152 during aninitialization period. Then, the fourth transistor T4 receiving theprevious-stage scan signal S(n−1) of the low level is turned on to applythe initialization voltage Vint to the gate electrode G1 of the drivingtransistor T1 and the second storage electrode E2 of the storagecapacitor Cst through the fourth transistor T4. As a result, the drivingtransistor T1 and the storage capacitor Cst are initialized. Theinitialization voltage Vint has a low value to turn on the drivingtransistor T1.

During the initialization period, a low level bypass signal GB is alsoapplied to the seventh transistor T7. The seventh transistor T7receiving it is turned on to apply the initialization voltage Vint tothe anode of the organic light emitting diode OLED through the seventhtransistor T7. As a result, the anode of the organic light emittingdiode OLED is also initialized.

Then, the scan signal Sn of a low level is applied to the pixel PXthrough the scan line 151 during a data writing period. The secondtransistor T2 and the third transistor T3 are turned on by the scansignal Sn of the low level. The scan signal Sn may include a pluralityof low level signals for one frame.

When the second transistor T2 is turned on, the data voltage Dm isinputted into the first electrode S1 of the driving transistor T1through the second transistor T2. In addition, the third transistor T3is turned on during the data writing period, and as a result, the secondelectrode D1 of the driving transistor T1 is electrically connected tothe gate electrode G1 and the second storage electrode E2 of the storagecapacitor Cst. The gate electrode G1 and the second electrode D1 of thedriving transistor T1 are diode-connected. In addition, the drivingtransistor T1 is turned on because a low voltage (e.g., theinitialization voltage Vint) is applied to the gate electrode G1 duringthe initialization period. As a result, the data voltage Dm inputtedinto the first electrode S1 of the driving transistor T1 is outputtedfrom the second electrode D1 through the channel of the drivingtransistor T1, and then is stored in the second storage electrode E2 ofthe storage capacitor Cst through the third transistor T3.

In this case, the voltage applied to the second storage electrode E2 maybe varied depending on the threshold voltage Vth of the drivingtransistor T1. When the data voltage Dm is applied to the firstelectrode S1 of the driving transistor T1 and the initialization voltageVint is applied to the gate electrode G1 of the driving transistor T1,the voltage outputted into the second electrode D1 may have a value ofVgs+Vth. Vgs indicates a difference between voltages applied to the gateelectrode G1 and the first electrode S1 of the driving transistor T1,and may have a value of Dm−Vint. Therefore, the voltage that isoutputted from the second electrode D1 and is stored in the secondstorage electrode E2 may have a value of Dm−Vint+Vth.

Thereafter, during an emission period, the light emission control signalEM supplied from the light emission control line 153 has a value of alow level to turn on the fifth transistor T5 and the sixth transistorT6. As a result, the driving voltage ELVDD is applied to the firstelectrode S1 of the driving transistor T1, and the second electrode D1of the driving transistor T1 is connected to the organic light emittingdiode OLED. The driving transistor T1 generates the driving current Idaccording to the voltage difference Vgs between the voltage of the gateelectrode G1 and the voltage of the first electrode S1 (i.e., thedriving voltage ELVDD). The driving current Id of the driving transistorT1 may have a value proportional to a square of Vgs−Vth. Herein, thevalue of Vgs is equal to a difference of the voltages applied toopposite ends of the storage capacitor Cst, and Vgs has a value ofVg−Vs, and thus it has a value of Dm−Vint+Vth−ELVDD. Herein, the valueof Vgs−Vth is obtained by subtracting the value of Vth, and it has avalue of Dm−Vint−ELVDD. That is, the driving current Id of the drivingtransistor T1 has a current irrespective of the threshold voltage Vth ofthe driving transistor T1 as an output.

Accordingly, even when the driving transistor T1 disposed in each pixelPX has a different threshold voltage Vth due to process dispersion, anoutput current of the driving transistor T1 may be made constant,thereby ameliorating non-uniformity of the characteristic.

In the above equation, the value of Vth may be slightly larger than 0 ora negative value in the case of a P-type transistor using apolycrystalline semiconductor. Further, the expression of “+” and “−”may be changed depending on a direction in which the voltage iscalculated. However, there is no difference in that the driving currentId, which is the output current of the driving transistor T1, may have avalue independent from the value of the threshold voltage Vth.

When the above-mentioned emitting period ends, the initialization periodstarts again, and the same operation is repeated from the beginning.

Each of the first electrode and the second electrode of each of thetransistors T1, T2, T3, T4, T5, T6, and T7 may be a source electrode ora drain electrode depending on the direction in which a voltage or acurrent is applied.

Hereinafter, a pixel of an organic light emitting diode displayaccording to an exemplary embodiment in which a cross-talk phenomenon isreduced by including a gate connector 156 and a bridge electrode 31disposed separately from the data line 171 to replace the drivingconnector will be described with reference to FIG. 2 to FIG. 4 .

FIG. 2 illustrates a top plan view of an exemplary embodiment of a pixelof an organic light emitting diode display according to the invention,FIG. 3 illustrates a cross-sectional view taken along line of FIG. 2 ,and FIG. 4 illustrates a cross-sectional view taken along line IV-IV′ ofFIG. 2 .

Referring to FIG. 2 , according to the exemplary embodiment, the organiclight emitting diode display includes a scan line 151, a previous-stagescan line 152, a light emission control line 153, and an initializationvoltage line 127 which extend mainly along a first direction D1, whichrespectively transfer a scan signal Sn, a previous-stage scan signalS(n−1), a light emission control signal EM, and an initializationvoltage Vint. A bypass signal GB is transferred through theprevious-stage scan line 152. However, according to another exemplaryembodiment, the bypass signal GB may be the same as a signal of thepresent scan line 151 or a signal of another scan line.

The organic light emitting diode display includes a data line 171 and adriving voltage line 172 extending along a second direction D2 thatintersects the first direction D1, which transfer a data voltage Dm anda driving voltage ELVDD, respectively.

The light emitting diode display includes a driving transistor T1, asecond transistor T2, a third transistor T3, a fourth transistor T4, afifth transistor T5, a sixth transistor T6, a seventh transistor T7, astorage capacitor Cst, and an organic light-emitting diode OLED.

Each channel of the driving transistor T1, the second transistor T2, thethird transistor T3, the fourth transistor T4, the fifth transistor T5,the sixth transistor T6, and the seventh transistor T7 is disposed in asemiconductor layer 130 which extends long. In addition, at leastportions of the first and second electrodes of the transistors T1, T2,T3, T4, T5, T6, and T7 are disposed in the semiconductor layer 130. Thesemiconductor layer 130 may be bent in various shapes. In an exemplaryembodiment, the semiconductor layer 130 may include an oxidesemiconductor or a polycrystalline semiconductor made of polysilicon.

The semiconductor layer 130 includes a channel doped with an N-typeimpurity or a P-type impurity and a first doped region and a seconddoped region disposed at opposite sides of the channel and having ahigher doping concentration than an impurity doped in the channel. Thefirst doped region and the second doped region correspond to the firstelectrode and the second electrode of each of the transistors T1, T2,T3, T4, T5, T6, and T7. If one of the first doped region and the seconddoped region is a source region, the other doped region is a drainregion. In addition, regions between the first electrodes and the secondelectrodes of different transistors may be doped in the semiconductorlayer such that the transistors may be electrically connected to eachother.

Each channel of the transistors T1, T2, T3, T4, T5, T6, and T7 overlapsthe gate electrode of the corresponding transistor in the plan view, andis disposed between the first electrode and the second electrode of thecorresponding transistor. The transistors T1, T2, T3, T4, T5, T6, and T7may have the substantially same stacked structure. Hereinafter, thedriving transistor T1 will be described in detail, and the remainingtransistors T2, T3, T4, T5, T6, and T7 will be briefly described.

The driving transistor T1 includes a channel, a first gate electrode155, a first electrode S1, and a second electrode D1. The channel of thedriving transistor T1 is disposed between the first electrode S1 and thesecond electrode D1 to overlap the first gate electrode 155 in the topplan view. The channel is curved in order to form a longer channellength within a limited region compared with the case that channel isstraight. As the length of the channel becomes longer, a driving rangeof the gate voltage Vg applied to the first gate electrode 155 of thedriving transistor T1 is widened and a driving current Id is constantlyincreased depending on the gate voltage Vg. As a result, it is possibleto control a gray scale of light emitted from the organic light-emittingdiode OLED more minutely and to improve display quality of the lightemitting diode display by adjusting a magnitude of the gate voltage Vg.In addition, since the channel extends in various directions rather thanextending in one direction, there is an advantage that the effect of theorientation in the manufacturing process is offset, thereby reducing aprocess scattering influence. Accordingly, it is possible to preventimage quality deterioration such as a stain defect that may occur by acharacteristic variation of the driving transistor T1 depending onregions of the display device due to process scattering (e.g., aluminance difference occurred depending on the pixel even when the samedata voltage Dm is applied). A shape of such channels according to theinvention is not limited to the illustrated Ω-type, but may be varioussuch as a U-shape, an S-shape, and the like.

Referring to FIG. 3 , the first gate electrode 155 overlaps the channelof the driving transistor T1 in the top plan view. The first electrodeS1 and the second electrode D1 are disposed at opposite sides of thechannel, respectively. An insulated extension of a storage electrode 126is disposed on the first gate electrode 155. The extension of thestorage electrode 126 overlaps the first gate electrode 155, with asecond gate insulating layer 160 interposed therebetween in the top planview to constitute a storage capacitor Cst. The extension of the storageelectrode 126 serves as a first storage electrode E1 of the storagecapacitor Cst (see FIG. 1 ), and the first gate electrode 155 serves asa second storage electrode E2 (see FIG. 1 ).

Referring back to FIG. 2 , a gate electrode of the second transistor T2may be a portion of the scan line 151. The data line 171 is connected toa first electrode S2 of the second transistor T2 through a contact hole62. The first electrode S2 and the second electrode D2 of the secondtransistor T2 may be disposed on the semiconductor layer 130.

The third transistor T3 may be disposed to include two transistorsadjacent to each other, as illustrated at a left side and a lower sidewith reference to a portion where the semiconductor layer 130 is foldedin FIG. 2 . Each of these two parts serves as the third transistor T3. Afirst electrode S3 of a first third transistor T3 in the left side isconnected to a second electrode D3 of a second third transistor T3 inthe lower side. A gate electrode of the two third transistors T3 may bea portion of the scan line 151 or a portion that protrudes upward ordownward from the scan line 151. Such a structure may be referred to asa dual-gate structure, and may prevent a leakage current from flowing.The first electrode S3 of the third transistor T3 (i.e., second thirdtransistor in the lower side) is connected to a first electrode S6 ofthe sixth transistor T6 and the second electrode D1 of the drivingtransistor T1.

The fourth transistor T4 is disposed at the portion where theprevious-stage scan line 152 and the semiconductor layer 130 meet. Agate electrode of the second transistor T2 may be a portion of theprevious-stage scan line 152. A first electrode S4 of a first fourthtransistor T4 is connected to a second electrode D4 of a second fourthtransistor T4. Such a structure may be referred to as a dual-gatestructure, and may prevent a leakage current from flowing. The secondelectrode D4 of the fourth transistor T4 in a right side is connected tothe second electrode D3 of the third transistor T3 through thesemiconductor layer 130.

A gate electrode of the fifth transistor T5 may be a portion of thelight emission control line 153. The driving voltage line 172 isconnected to a first electrode S5 of the fifth transistor T5 through acontact hole 67, and a second electrode D5 is connected to the firstelectrode S1 of the driving transistor T1 through the semiconductorlayer 130.

A gate electrode of the sixth transistor T6 may be a portion of thelight emission control line 153. A first connector 75 is connected to asecond electrode D6 of the sixth transistor T6 through a contact hole69, and a first electrode S6 is connected to the second electrode D1 ofthe driving transistor T1 through the semiconductor layer 130.

A gate electrode of the seventh transistor T7 may be a portion of theprevious-stage scan line 152. A first electrode S7 of the fifthtransistor T7 is connected to the first electrode S4 of the fourthtransistor T4. The initialization voltage line 127 is connected to asecond connector 72 through a contact hole 65. The second connector 72may be connected to the semiconductor layer 130 through the contact hole66, and the second electrode D7 may be connected to the second electrodeD6 of the sixth transistor T6. The first electrode S7 the seventhtransistor T7 and the second electrode D7 the seventh transistor T7 maybe disposed on the semiconductor layer 130. The seventh transistor T7illustrated in FIG. 2 operates a pixel disposed at an upper side of theillustrated pixel area. FIG. 2 schematically illustrates one pixel area,and the seventh transistor T7 which is operated in a pixel areaaccording to the exemplary embodiment is disposed in the semiconductorlayer 130 extending from the second electrode D6 of the sixth transistorT6. In a pixel area according to the exemplary embodiment, the secondelectrode D7 of the seventh transistor T7 is disposed at a lower side ofthe sixth transistor T6 to be connected to the second electrode D6 ofthe sixth transistor T6. In addition, in another pixel area of anotherexemplary embodiment, the first electrode S7 of the seventh transistorT7 may be disposed in the semiconductor layer 130 extending from thefirst electrode S4 of the fourth transistor T4.

The storage capacitor Cst includes a first storage electrode E1 and asecond storage electrode E2 which overlap each other, with the secondgate insulating layer 160 interposed therebetween. The second storageelectrode E2 may correspond to the first gate electrode 155 of thedriving transistor T1, and the first storage electrode E1 may correspondto the extension of the storage electrode 126. Herein, the second gateinsulating layer 160 serves as a dielectric material, and a capacitanceof the storage capacitor Cst is determined by the electric chargescumulated in the storage capacitor Cst and a voltage between the firstand second storage electrodes E1 and E2. It is possible to secure aspace in which the storage capacitor Cst can be disposed in the spacenarrowed by the channel of the driving transistor T1 occupying a largearea within the pixel by using the first gate electrode 155 as thesecond storage electrode E2.

The driving voltage line 172 is connected to the first storage electrodeE1 through a contact hole 68. Accordingly, the storage capacitor Cststores a charge corresponding to a difference between the drivingvoltage ELVDD transferred to the first storage electrode E1 through thedriving voltage line 172 and the gate voltage Vg of the first gateelectrode 155.

A pixel electrode (not illustrated), which is referred to as an anodeelectrode, is connected to the first connector 75 through a contact hole81.

The bridge electrode 31 overlaps the semiconductor layer 130 of thedriving transistor T1, the first gate electrode 155, the storageelectrode 126, the scan line 151, and the second electrode D3 of thethird transistor T3, and the gate connector 156 in the plan view. Thebridge electrode 31 may be disposed to cross the scan line 151, and maybe disposed in parallel with the data line 171 and a portion of thedriving voltage line 172.

Specifically, the bridge electrode 31 is disposed so as to extend from acentral portion of the Ω-type semiconductor layer 130 of the drivingtransistor T1 and through the second electrode D3 of the thirdtransistor T3 in the second direction D2. A first end of the bridgeelectrode 31 extending through the second electrode D3 of the thirdtransistor T3 may be disposed to be bent so as to not overlap thesemiconductor layer 130.

A second end of the bridge electrode 31 is connected to the first gateelectrode 155 through the contact hole 61.

The gate connector 156 is disposed to overlap one region of the bridgeelectrode 31 in the plan view. The gate connector 156 may extend fromthe second electrode D3 of the third transistor T3 in the seconddirection D2. The gate connector 156 may have an obliquely curved shapeat one end so as to overlap an obliquely curved shape of the bridgeelectrode 31.

The bridge electrode 31 and the gate connector 156 are connected throughthe contact hole 63. The second electrode D3 of the third transistor T3(i.e., the first third transistor T3 in the left side) and the gateconnector 156 are connected through a contact hole 64.

As such, the bridge electrode 31 connects the first gate electrode 155of the driving transistor T1 and the second electrode D3 of the thirdtransistor T3 through the gate connector 156.

Referring to FIG. 1 again, it may be seen that the gate electrode G1 ofthe driving transistor T1 and the second electrode D3 of the thirdtransistor T3 are electrically connected to each other through thedriving gate node Q.

In general, the driving transistor T1 controls the driving current Idflowing to the organic light emitting diode OLED, and stores a datavoltage in the storage capacitor Cst connected to the driving gate nodeQ of the driving transistor T1 to maintain it for one frame.Accordingly, a certain amount of driving current Id is supplied from thedriving transistor T1 to the organic light emitting diode OLED duringone frame to emit light.

A voltage variation of the data line 171 affects the voltage of thedriving gate node Q of the driving transistor T1 since parasiticcapacitance exists between the data line 171 and the driving connectorconnecting the first gate electrode G1 of the driving transistor T1 tothe second electrode D3 of the third transistor T3. The voltagevariation of the driving gate node Q induces a change of the drivingcurrent Id flowing through the organic light emitting diode OLED,causing a crosstalk phenomenon in which luminance of the display devicechanges.

Hereinafter, a pixel of an organic light emitting diode displayaccording to an exemplary embodiment in which a cross-talk phenomenon isreduced by including the gate connector 156 and the bridge electrode 31disposed separated from the data line 171 to replace the drivingconnector will be described following on a stacking order with referenceto FIG. 3 and FIG. 4 .

FIG. 3 illustrates a cross-sectional view taken along line of FIG. 2 ,and FIG. 4 illustrates a cross-sectional view taken along line IV-IV′ ofFIG. 2 .

Referring to FIG. 3 , the organic light emitting diode display accordingto the exemplary embodiment uses a substrate 100 made of a flexiblematerial such as plastic or polyimide (PI), or glass, for example. Abarrier layer 110 is disposed on the substrate 100, and a bridgeelectrode 31 made of a metal having conductivity or a semiconductormaterial having a similar conductive characteristic is disposed on thebarrier layer 110. A buffer layer 120 is disposed on the bridgeelectrode 31 so as to cover the bridge electrode 31. In an exemplaryembodiment, the layers 110 and 120 may be made of an inorganicinsulating material such as a silicon oxide, a silicon nitride, and analuminum oxide, and may also include an organic insulating material suchas polyimide or polyacryl (epoxy).

A semiconductor layer 130 including a channel 130 a 1 of the drivingtransistor T1 and a drain region of the second transistor T2 is disposedon the buffer layer 120.

A first gate insulating layer 140 covering the semiconductor layer 130is disposed on the semiconductor layer 130. The scan line 151 and thefirst gate electrode 155 of the driving transistor T1 are disposed onthe first gate insulating layer 140. The scan line 151, the first gateelectrode 155, the gate electrodes of the transistors, and the gateconnector 156 disposed on the first gate insulating layer 140 may bereferred to as a first gate conductor.

A second gate insulating layer 160 covering the first gate conductor isdisposed on the first gate conductor. In an exemplary embodiment, thefirst gate insulating layer 140 and the second gate insulating layer 160may include a material such as a silicon nitride, a silicon oxide, andan aluminum oxide. The storage electrode 126 may be disposed on thesecond gate insulating layer 160, and the storage electrode 126, theinitialization voltage line 127, etc. disposed on the second gateinsulating layer 160 may be referred to as a second gate conductor.

An interlayer-insulating layer 180 covering the second gate conductor isdisposed on the second gate conductor. In an exemplary embodiment, theinterlayer-insulating layer 180 may be made of a material such as asilicon nitride, a silicon oxide, and an aluminum oxide, and may be madeof an organic insulating material. The data line 171 may be disposed onthe interlayer-insulating layer 180, and the data line 171, the drivingvoltage line 172, the first connector 75, the second connector 72, andthe driving connector (not illustrated, see reference number 71 of FIG.5 ) disposed on the interlayer-insulating layer 180 may be referred toas a data conductor.

The data line 171 is disposed far away from the bridge electrode 31 withthe first gate insulating layer 140, the second gate insulating layer160, the first gate conductor and the second gate conductortherebetween. Accordingly, a value of parasitic capacitance C existingbetween the data line 171 and the bridge electrode 31 is reduced, andthe voltage of the driving gate node Q of the driving transistor T1 isless affected by the voltage variation of the data line 171.Accordingly, the driving current Id flowing through the organic lightemitting diode OLED is constantly maintained, so that the luminance ofthe organic light emitting diode is hardly changed.

Hereinafter, a structure in which the gate electrode G1 of the drivingtransistor T1 and the second electrode D3 of the third transistor T3 areconnected by the bridge electrode 31 will be described in detail withreference to FIG. 4 .

An organic light emitting diode display according to an exemplaryembodiment may use a substrate 100 made of a flexible material. Abarrier layer 110 is disposed on the substrate 100, and a bridgeelectrode 31 made of a metal having conductivity or a semiconductormaterial having a similar conductive characteristic is disposed on thebarrier layer 110. A buffer layer 120 is disposed on the bridgeelectrode 31.

A semiconductor layer 130 including a drain region 130 d 3 indicatingthe second electrode D3 of the third transistor T3 and a channel 130 a 1of the driving transistor T1 is disposed on the buffer layer 120.

A first gate insulating layer 140 covering the semiconductor layer 130is disposed on the semiconductor layer 130. The first gate electrode 155of the driving transistor T1, the scan line 151, and the gate connector156 are disposed on the first gate insulating layer 140. The first gateelectrode 155 of the driving transistor T1 may be disposed to overlapthe channel 130 a 1 of the driving transistor T1 and the bridgeelectrode 31.

The gate connector 156 is disposed to overlap the drain region 130 d 3of the third transistor T3 and a partial region of the bridge electrode31. A first end of the gate connector 156 may be disposed within thebridge electrode 31.

The first gate electrode 155 is connected to the bridge electrode 31through a contact hole 61, and the gate connector 156 is connected tothe bridge electrode 31 through a contact hole 63. In addition, the gateconnector 156 is connected to the drain region 130 d 3 of the thirdtransistor T3 through the contact hole 64.

In other words, the third transistor T3 may transfer a compensatedvoltage Dm+Vth from the drain region 130 d 3 to the gate electrode G1 ofthe driving transistor T1 through the gate connector 156 and the bridgeelectrode 31.

A second gate insulating layer 160 is disposed on the first gateelectrode 155, the scan line 151, and the gate connector 156 to coverthem. The storage electrode 126 is disposed on the second gateinsulating layer 160, and an interlayer-insulating layer 180 is disposedon the storage electrode 126. Herein, the storage electrode 126 may bedisposed to partially overlap the first gate electrode 155.

Although not shown in FIG. 4 , a data conductor is disposed on theinterlayer-insulating layer 180, and a passivation layer (notillustrated) covering the data conductor may be disposed on the dataconductor. The passivation layer may be made of an organic insulatingmaterial, for example. A pixel electrode (not illustrated) may bedisposed on the passivation layer, and the pixel electrode may beconnected to the data conductor through a contact hole disposed in thepassivation layer. A barrier rib (not illustrated) may be disposed onthe passivation layer and the pixel electrode. The barrier rib maydefine an open portion that overlaps the pixel electrode, and an organiclight emitting layer may be disposed in the open portion. A commonelectrode (not illustrated) may be disposed on the organic emissionlayer and the barrier rib. The pixel electrode, the organic emissionlayer, and the common electrode may constitute an organic light emittingdiode OLED. When holes and electrons are injected from the pixelelectrode and the common electrode into the organic emission layer inthe organic light emitting diode OLED, excitons formed by combining theinjected holes and electrons are emitted when they fall from an excitedstate to a ground state.

Hereinafter, a plan view and a cross-sectional view of an organic lightemitting diode display according to an exemplary embodiment in which across-talk phenomenon is reduced by including the gate connector 156,the short driving connector 71, and the bridge electrode 31 disposedseparately from the data line 171 to replace the driving connector willbe described following a stacking order with reference to FIG. 5 andFIG. 6 . A description of the same constituent elements as theconstituent elements described above will be omitted.

FIG. 5 illustrates a top plan view of another exemplary embodiment of apixel area of an organic light emitting diode display according to theinvention, and FIG. 6 illustrates a cross-sectional view taken alongline V-V′ of FIG. 5 .

Referring to FIG. 5 , the bridge electrode 31 is disposed to cross thescan line 151, and is disposed in parallel with the data line 171 and aportion of the driving voltage line 172.

The bridge electrode 31 is disposed so as to extend from a centralportion of the Ω-type semiconductor layer 130 of the driving transistorT1 and through the second electrode D3 of the third transistor T3 in thesecond direction D2. The bridge electrode 31 overlaps the first gateelectrode 155, the storage electrode 126, and a portion of the scan line151 in the plan view, and a first end of the extended bridge electrode31 may be disposed to be bent so as to not overlap the semiconductorlayer 130. According to another exemplary embodiment, when thesemiconductor layer 130 is U-shaped, the bridge electrode 31 may bedisposed to have a short length.

The bridge electrode 31 is connected to the first gate electrode 155through the contact hole 61.

The gate connector 156 and the driving connector 71 are disposed tooverlap the bridge electrode 31, but do not overlap the scan line 151.The driving connector 71 is disposed to partially overlap the gateconnector 156 and the bridge electrode 31, and to overlap the secondelectrode D3 of the third transistor T3. Herein, the driving connector71 may be disposed obliquely to overlap the bridge electrode 31 and thesecond electrode D3 of the third transistor T3.

The driving connector 71 may be disposed in various shapes to overlapthe gate electrode 155, the bridge electrode 31, and the secondelectrode D3 of the third transistor T3. Specifically, in an exemplaryembodiment, it may be disposed in various shapes such as an obliquepolygon, a long extended polygon, and a polygon including a chamfer. Thegate connector 156 may be disposed in a polygonal shape including arectangle and a polygon including a chamfer so as to overlap one regionof the bridge electrode 31 and one region of the driving connector 71.

The bridge electrode 31 and the gate connector 156 are connected throughthe contact hole 63, and the gate connector 156 and the drivingconnector 71 are connected through the contact hole 60. In addition, thedriving connector 71 is connected to the second electrode D3 (i.e., thedrain region 130 d 3 in FIG. 6 ) of the third transistor T3 through thecontact hole 64.

As such, the bridge electrode 31 connects the first gate electrode 155of the driving transistor T1 and the second electrode D3 of the thirdtransistor T3 through the gate connector 156 and the driving connector71.

Hereinafter, a structure in which the bridge electrode 31 is connectedto the first gate electrode 155 of the driving transistor T1 and thedrain region 130 d 3 of the third transistor T3 will be described indetail with reference to a cross-sectional view of FIG. 6 .

Referring to FIG. 6 , the organic light emitting diode display accordingto an exemplary embodiment includes the bridge electrode 31 on thebarrier layer 110. A buffer layer 120 is disposed on the bridgeelectrode 31 so as to cover the bridge electrode 31.

A semiconductor layer 130 including a drain region 130 d 3 indicatingthe second electrode D3 of the third transistor T3 and a channel 130 a 1of the driving transistor T1 is disposed on the buffer layer 120.

A first gate insulating layer 140 covering the semiconductor layer 130is disposed on the semiconductor layer 130. The first gate electrode 155of the driving transistor T1, the scan line 151, and the gate connector156 are disposed on the first gate insulating layer 140. The first gateelectrode 155 of the driving transistor T1 may be disposed to overlap aportion of the channel 130 a 1 of the driving transistor T1 and thebridge electrode 31.

The second gate insulating layer 160 is disposed on the first gateelectrode 155 and the scan line 151 to cover them. The storage electrode126 disposed on the second gate insulating layer 160 may overlap thegate electrode 155, the bridge electrode 31, and the channel 130 a 1 ofthe driving transistor T1.

The interlayer-insulating layer 180 is disposed on the storage electrode126 so as to cover the storage electrode 126. A driving connector 71 isdisposed on the interlayer-insulating layer 180. The driving connector71 may be disposed to overlap the gate connector 156, the drain region130 d 3, and the bridge electrode 31.

The driving connector 71 is connected to the drain region 130 d 3through the contact hole 64, and connected to the gate connector 156through a contact hole 60. The gate connector 156 is connected to thebridge electrode 31 through the contact hole 63. In addition, the firstgate electrode 155 is connected to the bridge electrode 31 through thecontact hole 61.

In other words, the third transistor T3 may transfer the compensatedvoltage Dm+Vth from the drain region 130 d 3 to the gate electrode G1 ofthe driving transistor T1 through the driving connector 71, the gateconnector 156, and the bridge electrode 31.

The organic light emitting diode display according to the exemplaryembodiment may connect the third transistor T3 and the drivingtransistor T1 even by using the driving connector 71 only at a shortregion, so as to reduce parasitic capacitance existing between the dataline 171 and the driving connector 71.

In addition, after forming the bridge electrode 31 at an upper portionof the barrier layer 110, the gate connector 156 may be disposed whenthe first gate conductor is disposed, and the driving connector 71 whenthe data conductor is disposed, and thus it is possible to provide anorganic light emitting diode display in which the cross-talk is reducedwithout using an additional mask process.

Hereinafter, a pixel of an organic light emitting diode displayaccording to an exemplary embodiment in which a cross-talk phenomenon isreduced by including the bridge electrode 31 disposed separately fromthe data line 171 to replace the driving connector will be describedwith reference to FIG. 7 and FIG. 8 .

FIG. 7 illustrates a top plan view of still another exemplary embodimentof an organic light emitting diode display according to the invention,and FIG. 8 illustrates a cross-sectional view taken along lineVIII-VIII′ of FIG. 7 .

Referring to FIG. 7 , the bridge electrode 31 is disposed to cross thescan line 151, and is disposed in parallel with the data line 171 and aportion of the driving voltage line 172.

The bridge electrode 31 is disposed so as to extend from a centralportion of the Ω-type semiconductor layer 130 of the driving transistorT1 and through the second electrode D3 of the third transistor T3 in thesecond direction D2. The bridge electrode 31 overlaps the first gateelectrode 155, the storage electrode 126, and a portion of the scan line151 and may be disposed even in the drain region 130 d 3 of the thirdtransistor T3. The bridge electrode 31 may have a long rectangularshape, but may include a partially bent shape in order to avoidoverlapping other wires in the plan view.

The bridge electrode 31 connects the drain region 130 d 3 of the thirdtransistor T3 and the first gate electrode 155.

Hereinafter, a shape in which the bridge electrode 31 connects the firstgate electrode 155 of the driving transistor T1 and the drain region 130d 3 of the third transistor T3 will be described in detail withreference to a cross-sectional view of FIG. 8 .

Referring to FIG. 8 , the organic light emitting diode display accordingto an exemplary embodiment includes the bridge electrode 31 on thebarrier layer 110. A buffer layer 120 is disposed on the bridgeelectrode 31 so as to cover the bridge electrode 31.

A semiconductor layer 130 including a drain region 130 d 3 indicatingthe second electrode D3 of the third transistor T3, and a channel 130 a1 of the driving transistor T1 is disposed on the buffer layer 120.

A first gate insulating layer 140 covering the semiconductor layer 130is disposed on the semiconductor layer 130. The scan line 151 and thefirst gate electrode 155 of the driving transistor T1 are disposed onthe first gate insulating layer 140.

The drain region 130 d 3 is connected to the bridge electrode 31 througha contact hole 70, and the first gate electrode 155 of the drivingtransistor T1 is connected to the bridge electrode 31 by the contacthole 61.

In other words, the third transistor T3 may transfer the compensatedvoltage Dm+Vth from the drain region 130 d 3 to the gate electrode G1 ofthe driving transistor T1, by the bridge electrode 31.

Hereinafter, a pixel of an organic light emitting diode displayaccording to an exemplary embodiment in which a cross-talk phenomenon isreduced by including the gate connector 156 and the bridge electrode 31in a case that the semiconductor layer 130 of the driving transistor T1has another shape will be described with reference to FIG. 9 and FIG. 10.

FIG. 9 illustrates a top plan view of still another exemplary embodimentof an organic light emitting diode display according to the invention,and FIG. 10 illustrates a cross-sectional view taken along line X-X′ ofFIG. 9 .

Referring to FIG. 9 , the semiconductor layer 130 of the drivingtransistor T1 has an ‘S’ shape.

The bridge electrode 31 overlaps the semiconductor layer 130 of thedriving transistor T1, the first gate electrode 155, the storageelectrode 126, the scan line 151, the second electrode D3 of the thirdtransistor T3, and the gate connector 156 in the plan view. The bridgeelectrode 31 may be disposed to cross the scan line 151, and may bedisposed in parallel with the data line 171 and a portion of the drivingvoltage line 172.

Specifically, the bridge electrode 31 is disposed so as to extend froman upper side of the S-type semiconductor layer 130 of the drivingtransistor T1 and through the second electrode D3 of the thirdtransistor T3 in the second direction D2. A first end of the bridgeelectrode 31 extending through the second electrode D3 of the thirdtransistor T3 may be disposed to be bent so as to not overlap thesemiconductor layer 130 in the plan view.

The bridge electrode 31 is connected to the first gate electrode 155through the contact hole 61.

The gate connector 156 is disposed to overlap one region of the bridgeelectrode 31. The gate connector 156 may extend from second electrode D3of the third transistor T3 in the second direction D2. The gateconnector 156 may have an obliquely curved shape so as to overlap anobliquely curved shape of the bridge electrode 31 in the plan view.

The bridge electrode 31 and the gate connector 156 are connected throughthe contact hole 63. The second electrode D3 (i.e., the drain region 130d 3) of the third transistor T3 and the gate connector 156 are connectedthrough the contact hole 64. As such, the bridge electrode 31 connectsthe first gate electrode 155 of the driving transistor T1 and the secondelectrode D3 of the third transistor T3 through the gate connector 156.

Hereinafter, a structure in which the bridge electrode 31 is connectedto the first gate electrode 155 of the driving transistor T1 and thedrain region 130 d 3 of the third transistor T3 will be described withreference to a cross-sectional view of FIG. 10 .

Referring to FIG. 10 , the organic light emitting diode displayaccording to an exemplary embodiment includes the bridge electrode 31 onthe barrier layer 110. A buffer layer 120 is disposed on the bridgeelectrode 31 so as to cover the bridge electrode 31.

A semiconductor layer 130 is disposed on the buffer layer 120.

A semiconductor layer 130 includes a plurality of channels 130 a ₁ and adrain region 130 d 3. The plurality of channels 130 a ₁ indicateschannel regions of the driving transistor T1 and the drain region 130 d₃ indicates the second electrode D3 of the third transistor T3.

A first gate insulating layer 140 covering the semiconductor layer 130is disposed on the semiconductor layer 130. The first gate electrode 155of the driving transistor T1, the scan line 151, and the gate connector156 are disposed on the first gate insulating layer 140.

The second gate insulating layer 160 is disposed on the first gateelectrode 155 and the scan line 151 to cover them. The storage electrode126 disposed on the second gate insulating layer 160 may overlap thegate electrode 155, the bridge electrode 31, and the channels 130 a 1 ofthe driving transistor T1 in the plan view.

The gate connector 156 is connected to the bridge electrode 31 throughthe contact hole 63, and is connected to the drain region 130 d 3through the contact hole 64. In addition, the first gate electrode 155is connected to the bridge electrode 31 through the contact hole 61.

In other words, the third transistor T3 may transfer a compensatedvoltage Dm+Vth from the drain region 130 d 3 to the gate electrode G1 ofthe driving transistor T1 through the gate connector 156 and the bridgeelectrode 31.

Therefore, since no gate driving connector in the data conductor layeris used, no parasitic capacitance between the data line 171 and the gatedriving connector exists. Parasitic capacitance may exist between thedata line 171 and the bridge electrode 31.

However, since there are a plurality of layers between the data line 171and the bridge electrode 31, the parasitic capacitance may beconsiderably reduced. As the parasitic capacitance decreases, thecross-talk phenomenon also decreases.

Hereinafter, a structure in which the cross-talk phenomenon is reducedthrough the bridge electrode 31 and the gate connector in an organiclight emitting diode display according to another exemplary embodimentincluding the third gate conductor will be described with reference toFIG. 11 to FIG. 16 .

Referring to FIG. 11 and FIG. 12 , the organic light emitting diodedisplay according to the exemplary embodiment includes an upper gateconnector 53 and the bridge electrode 31 disposed separately from thedata line 171 to replace the driving connector.

FIG. 11 illustrates a top plan view of an exemplary embodiment of aregion including one pixel of an organic light emitting diode displayaccording to the invention, and FIG. 12 illustrates a cross-sectionalview taken along line XII-XII′ of FIG. 11 .

Referring to FIG. 11 , according to the exemplary embodiment, theorganic light emitting diode display includes a scan line 151, aprevious-stage scan line 152, a light emission control line 153, and aninitialization voltage line 127 which extend mainly along a firstdirection D1 which transfer a scan signal Sn, a previous-stage scansignal S(n−1), a light emission control signal EM, and an initializationvoltage Vint, respectively. Two previous-stage scan lines 152 and twoinitialization voltage lines 127 are illustrated in FIG. 11 . A signalfor driving an upper pixel area (not illustrated) may be applied to theprevious-stage scan line 152 and the initialization voltage line 127which are illustrated at an upper side of the scan line 151. In theexemplary embodiment, a scan signal Sn and an initialization voltageVint may be applied from the previous-stage scan line 152 and theinitialization voltage line 127 illustrated below the light emissioncontrol line 153, respectively.

The organic light emitting diode display includes a data line 171 and adriving voltage line 172 extending along a second direction D2 thatintersects the first direction D1 which transfer a data voltage Dm and adriving voltage ELVDD, respectively. The driving voltage line 172includes an extension having a slightly bent structure and an expandedwidth. The driving voltage line 172 extends to cover a portion of thedriving transistor T1, portions of the third transistors T3-1 and T3-2,and portions of the fourth transistors T4-1 and T4-2.

One pixel PX of the light emitting diode display includes a drivingtransistor T1, a second transistor T2, a third transistor T3, a fourthtransistor T4, a fifth transistor T5, a sixth transistor T6, a seventhtransistor T7, a storage capacitor Cst, and an organic light-emittingdiode OLED. The third transistor T3 has a structure in which twotransistors T3-1 and T3-2 are connected with each other, and has astructure in which a signal inputted into a first-side transistor isoutputted through a second-side transistor while being simultaneouslyturned on by the same gate signal.

In FIG. 11 and FIG. 12 , even though an organic light emitting diodeOLED is not illustrated, the organic light emitting diode OLED includesof a pixel electrode, an organic emission layer, and a common electrode.A structure of the organic light emitting diode OLED is disposed on theconnection structure of the transistors T1 to T7 illustrated in FIG. 11.

Each channel of the driving transistor T1, the second transistor T2, thethird transistor T3, the fourth transistor T4, the fifth transistor T5,the sixth transistor T6, and the seventh transistor T7 is disposed inthe semiconductor layer 130 which extends long. In addition, at leastportions of the first and second electrodes of the transistors T1, T2,T3, T4, T5, T6, and T7 are disposed in the semiconductor layer 130. Thesemiconductor layer 130 may be disposed to be bent in various shapes.The semiconductor layer 130 may include an oxide semiconductor or apolycrystalline semiconductor made of polysilicon, for example.

Each channel of the transistors T1, T2, T3, T4, T5, T6, and T7 overlapsa gate electrode of the corresponding transistor, and is disposedbetween the first electrode and the second electrode of thecorresponding transistor. The transistors T1, T2, T3, T4, T5, T6, and T7may have a substantially same stacked structure. Hereinafter, thedriving transistor T1 will be described in detail, and the remainingtransistors T2, T3, T4, T5, T6, and T7 will be briefly described.

The driving transistor T1 includes a channel, a first gate electrode155, a first electrode S1, and a second electrode D1. The channel of thedriving transistor T1 is disposed between the first electrode S1 and thesecond electrode D1 and overlaps the first gate electrode 155 in the topplan view. The channel is curved in order to form a longer channellength within a limited region compared with the case that channel isstraight. A shape of such channels according to the invention is notlimited to the illustrated Ω-type, but may be various such as a U-shape,an S-shape, and the like.

The first gate electrode 155 overlaps the channel in the top plan view.The first electrode S1 and the second electrode D1 are disposed atopposite sides of the channel, respectively. An insulated extension ofthe storage electrode 126 is disposed on the first gate electrode 155.The extension of the storage electrode 126 overlaps the first gateelectrode 155 with the second gate insulating layer 160 interposedtherebetween in the plan view to constitute a storage capacitor Cst. Theextension of the storage electrode 126 serves as a first storageelectrode E1 of the storage capacitor Cst (see FIG. 1 ), and the firstgate electrode 155 serves as a second storage electrode E2 (see FIG. 1).

A gate electrode of the second transistor T2 may be a portion of thescan line 151. The data line 171 is connected to a first connector 51through a contact hole 43. The first connector 51 is connected to thefirst electrode S2 of the second transistor T2 through a contact hole42. The first electrode S2 and the second electrode D2 of the secondtransistor T2 may be disposed on the semiconductor layer 130.

The third transistor T3 may be disposed to include two transistorsadjacent to each other as illustrated at a left side and a lower sidewith reference to a portion where the semiconductor layer 130 is foldedin FIG. 11 . Each of these two parts serves as the third transistor T3.A first electrode S3 of a first third transistor T3-1 in the left sideis connected to a second electrode D3 of a second third transistor T3-2in the lower side. A gate electrode of the two third transistors T3-1and T3-2 may be a portion of the scan line 151 or a portion thatprotrudes upward from the scan line 151. Such a structure may bereferred to as a dual-gate structure, and may prevent a leakage currentfrom flowing. The first electrode S3 of the second third transistor T3-2is connected to a first electrode S6 of the sixth transistor T6 and thesecond electrode D1 of the driving transistor T1.

The fourth transistor T4 is disposed at the portion where theprevious-stage scan line 152 and the semiconductor layer 130 meet. Agate electrode of the second transistor T2 may be a portion of theprevious-stage scan line 152. A first electrode S4 of a one fourthtransistor T4 is connected to a second electrode D4 of the other fourthtransistor T4. Such a structure may be referred to as a dual-gatestructure, and may prevent a leakage current from flowing. The secondelectrode D4 of the fourth transistor T4 (i.e., the fourth transistorT4-1 at the left side) is connected to the second electrode D3 of thethird transistor T3 through the semiconductor layer 130. The firstelectrode S4 of the fourth transistor T4-2 at the right side isconnected to the initialization voltage line 127 through a contact hole41.

A gate electrode of the fifth transistor T5 may be a portion of thelight emission control line 153. The first electrode S5 of the fifthtransistor T5 is connected to the second connector 52 through a contacthole 45. The second connector 52 is connected to the driving voltageline 172 through a contact hole 44. A second electrode D5 of the fifthtransistor T5 is connected to the first electrode S1 of the drivingtransistor T1 through the semiconductor layer 130.

A gate electrode of the sixth transistor T6 may be a portion of thelight emission control line 153. The third connector 50 is connected toa second electrode D6 of the sixth transistor T6 through a contact hole47, and a first electrode S6 of the sixth transistor T6 is connected tothe second electrode D1 of the driving transistor T1 through thesemiconductor layer 130.

A gate electrode of the seventh transistor T7 may be a portion of theprevious-stage scan line 152. The second electrode D7 of the seventhtransistor T7 is connected to the second electrode D6 of the sixthtransistor T6 through the semiconductor layer 130. The first electrodeS7 of the seventh transistor T7 is connected to the initializationvoltage line 127 through a contact hole 49.

The storage capacitor Cst includes a first storage electrode E1 and asecond storage electrode E2 which overlap each other with a second gateinsulating layer 160 interposed therebetween. The second storageelectrode E2 may correspond to the first gate electrode 155 of thedriving transistor T1, and the first storage electrode E1 may correspondto the extension of the storage electrode 126. Herein, the second gateinsulating layer 160 serves as a dielectric material, and a capacitanceof the storage capacitor Cst is determined by the electric chargescumulated in the storage capacitor Cst and a voltage between the firstand second storage electrodes E1 and E2. It is possible to secure aspace in which the storage capacitor Cst can be disposed in the spacenarrowed by the channel of the driving transistor T1 occupying a largearea within the pixel by using the first gate electrode 155 as thesecond storage electrode E2.

The first storage electrode E1 is connected to a second connector 52through a contact hole 46. Herein, the second connector 52 may beconnected to the driving voltage line 172 through the contact hole 44,and a driving voltage ELVDD may be applied to the first storageelectrode E1 by the second connector 52. Accordingly, the storagecapacitor Cst stores a charge corresponding to a difference between thedriving voltage ELVDD transferred to the first storage electrode E1through the driving voltage line 172 and the gate voltage Vg of thefirst gate electrode 155.

A pixel electrode, which is referred to as an anode electrode, isconnected to a third connector 50 through a contact hole 81.

The bridge electrode 31 overlaps the semiconductor layer 130 of thedriving transistor T1, the first gate electrode 155, the storageelectrode 126, the scan line 151, the second electrode D3 of the thirdtransistor T3, and the upper gate connector 53. The bridge electrode 31may be disposed to cross the scan line 151, and may be disposed inparallel with a portion of the data line 171. In addition, the bridgeelectrode 31 may be disposed to overlap the driving voltage line 172 inthe plan view.

Specifically, the bridge electrode 31 is disposed so as to extend from acentral portion of the Ω-type semiconductor layer 130 of the drivingtransistor T1 and through the second electrode D3 of the thirdtransistor T3 in the second direction D2. A first end of the bridgeelectrode 31 extending through the second electrode D3 of the thirdtransistor T3 may be disposed to be bent so as to not overlap thesemiconductor layer 130.

The bridge electrode 31 is connected to the first gate electrode 155through a contact hole 91.

The upper gate connector 53 is disposed to overlap one region of thebridge electrode 31. The upper gate connector 53 may extend from thesecond electrode D3 of the third transistor T3 in the second directionD2. The upper gate connector 53 may have a curved shape so as to overlapan obliquely curved shape of the bridge electrode 31.

The bridge electrode 31 and the upper gate connector 53 are connectedthrough a contact hole 92. The second electrode D3 of the thirdtransistor T3 (i.e., the drain region 130 d 3) and the upper gateconnector 53 are connected through a contact hole 93.

As such, the bridge electrode 31 connects the first gate electrode 155of the driving transistor T1 and the second electrode D3 of the thirdtransistor T3 through the upper gate connector 53.

The invention is to prevent the crosstalk phenomenon, and it is therebypossible to provide an organic light emitting diode display in which thecross-talk phenomenon is reduced by forming the bridge electrode 31 at alower portion of the buffer layer 120 to replace the gate drivingconnector or by forming a gate connector only in small regions.

Hereinafter, an organic light emitting diode display according toanother exemplary embodiment in which the crosstalk phenomenon isreduced by including the bridge electrode 31 will be described followinga stacking order with reference to FIG. 12 .

FIG. 12 illustrates a cross-sectional view taken along line XII-XII′ ofFIG. 11 .

Referring to FIG. 12 , the organic light emitting diode displayaccording to the exemplary embodiment uses a substrate 100 made of aflexible material such as plastic or polyimide (“PI”). A barrier layer110 is disposed on the substrate 100, and a bridge electrode 31 made ofa metal having conductivity or a semiconductor material having a similarconductive characteristic is disposed on the barrier layer 110. A bufferlayer 120 is disposed on the bridge electrode 31. In an exemplaryembodiment, the barrier layer 110 and the second buffer layer 120 mayinclude an inorganic insulating material such as a silicon oxide, asilicon nitride, or an aluminum oxide.

A semiconductor layer 130 including a drain region 130 d 3 indicatingthe second electrode D3 of the third transistor T3 and a channel 130 a 1of the driving transistor T1 is disposed on the buffer layer 120.

A first gate insulating layer 140 covering the semiconductor layer 130is disposed on the semiconductor layer 130. The scan line 151 and thefirst gate electrode 155 of the driving transistor T1 are disposed onthe first gate insulating layer 140. The scan line 151, the first gateelectrode 155, the gate electrodes disposed on the transistors, and alower gate connector 54 disposed on the first gate insulating layer 140may be referred to as a first gate conductor.

A second gate insulating layer 160 covering the first gate conductor isdisposed on the first gate conductor. In an exemplary embodiment, thefirst gate insulating layer 140 and the second gate insulating layer 160may be made of a material such as a silicon nitride, a silicon oxide,and an aluminum oxide. The storage electrode 126 may be disposed on thesecond gate insulating layer 160, and the storage electrode 126, theinitialization voltage line 127, etc. disposed on the second gateinsulating layer 160 may be referred to as a second gate conductor.

A third gate insulating layer 170 covering the second gate conductor isdisposed on the second gate conductor.

In an exemplary embodiment, the third gate insulating layer 170 may bemade of a material such as a silicon nitride, a silicon oxide, and analuminum oxide. The upper gate connector 53 may be disposed on the thirdgate insulating layer 170, and the upper gate connector 53, the firstconnector 51, the second connector 52, and the third connector 50disposed on the third gate insulating layer 170 may be referred to as athird gate conductor.

Specifically, the upper gate connector 53 is disposed to overlap thedrain region 130 d 3 of the third transistor T3 and the bridge electrode31.

The first gate electrode 155 is connected to the bridge electrode 31through the contact hole 91, and the upper gate connector 53 isconnected to the bridge electrode 31 through the contact hole 92. Inaddition, the upper gate connector 53 is connected to the drain region130 d 3 of the third transistor T3 through the contact hole 93.

In other words, the third transistor T3 may transfer the compensatedvoltage Dm+Vth to the gate electrode G1 of the driving transistor T1 andthe second storage electrode E2 of the storage capacitor Cst through theupper gate connector 53 and the bridge electrode 31.

An interlayer-insulating layer 180 covering the third gate conductor isdisposed on the third gate conductor. In an exemplary embodiment, theinterlayer-insulating layer 180 may be made of a material such as asilicon nitride, a silicon oxide, and an aluminum oxide, and may be madeof an organic insulating material. The driving voltage line 172 isdisposed on the interlayer-insulating layer 180, and the data line 171and driving voltage line 172 disposed on the interlayer-insulating layer180 may be referred to as a data conductor.

The driving voltage line 172 may be disposed in a wide region so as tooverlap the upper gate connector 53, the storage electrode 126, thefirst gate electrode 155, the scan line 151, the semiconductor layer130, and the bridge electrode 31.

Although not shown in FIG. 12 , a passivation layer (not illustrated)covering the driving voltage line 172 may be disposed on the drivingvoltage line 172. The passivation layer may include an organicinsulating material. A pixel electrode (not illustrated) may be disposedon the passivation layer, and the pixel electrode may be connected tothe data conductor through a contact hole disposed in the passivationlayer. A barrier rib (not illustrated) may be disposed on thepassivation layer and the pixel electrode. The barrier rib may have anopen portion that overlaps the pixel electrode, and an organic lightemitting layer may be disposed in the open portion. A common electrode(not illustrated) may be disposed on the organic emission layer and thebarrier rib. The pixel electrode, the organic emission layer, and thecommon electrode constitute an organic light emitting diode OLED. Whenholes and electrons are injected from the pixel electrode and the commonelectrode into the organic emission layer in the organic light emittingdiode OLED, excitons formed by combining the injected holes andelectrons are emitted when they fall from an excited state to a groundstate.

Hereinafter, a pixel of an organic light emitting diode displayaccording to another exemplary embodiment in which a cross-talkphenomenon is reduced by including the lower gate connector 54 and thebridge electrode 31 disposed separately from the data line 171 toreplace the driving connector will be described with reference to FIG.13 and FIG. 14 .

FIG. 13 illustrates a top plan view of another exemplary embodiment of aregion including one pixel of an organic light emitting diode displayaccording to the invention, and FIG. 14 illustrates a cross-sectionalview taken along line XIV-XIV′ of FIG. 13 .

Referring to FIG. 13 , the bridge electrode 31 is disposed so as tocross the scan line 151 and is disposed in parallel with the data line171. In addition, the bridge electrode 31 may be disposed to overlap anextension of the driving voltage line 172.

The bridge electrode 31 is disposed so as to extend from a centralportion of the Ω-type semiconductor layer 130 of the driving transistorT1 and through the second electrode D3 of the third transistor T3 in thesecond direction D2. The bridge electrode 31 overlaps the first gateelectrode 155, the storage electrode 126, and a portion of the scan line151, and a first end of the extended bridge electrode 31 may be bent.According to another exemplary embodiment, in the case that thesemiconductor layer 130 is U-shaped, the bridge electrode 31 may bedisposed to have a short length.

The lower gate connector 54 overlaps one region of the bridge electrode31. The lower gate connector 54 may extend from second electrode D3 ofthird transistor T3 in the second direction D2. The lower gate connector54 may have a curved shape so as to overlap an obliquely curved shape ofthe bridge electrode 31.

The bridge electrode 31 is connected to the first gate electrode 155through a contact hole 91.

The bridge electrode 31 and the lower gate connector 54 are connectedthrough a contact hole 94. The second electrode D3 of the thirdtransistor T3 and the lower gate connector 54 are connected through acontact hole 95.

As such, the bridge electrode 31 connects the first gate electrode 155of the driving transistor T1 and the drain region 130 d 3 of the thirdtransistor T3 through the lower gate connector 54.

Hereinafter, a structure in which the bridge electrode 31 is connectedto the first gate electrode 155 of the driving transistor T1 and thedrain region 130 d 3 of the third transistor T3 will be described indetail with reference to a cross-sectional view of FIG. 14 .

Referring to FIG. 14 , the organic light emitting diode displayaccording to another exemplary embodiment includes the bridge electrode31 on the barrier layer 110. A buffer layer 120 is disposed on thebridge electrode 31 so as to cover the bridge electrode 31.

A semiconductor layer 130 including a drain region 130 d 3 indicatingthe second electrode D3 of the third transistor T3 and a channel 130 a 1of the driving transistor T1 is disposed on the buffer layer 120.

A first gate insulating layer 140 covering the semiconductor layer 130is disposed on the semiconductor layer 130.

The first gate electrode 155 of the driving transistor T1, the scan line151, and the lower gate connector 54 are disposed on the first gateinsulating layer 140.

The lower gate connector 54 is disposed to overlap the drain region 130d 3 of the third transistor T3 and a partial region of the bridgeelectrode 31.

The lower gate connector 54 is connected to the drain region 130 d 3 ofthe third transistor T3 through the contact hole 95, and is connected tothe bridge electrode 31 through the contact hole 94. In addition, thefirst gate electrode 155 is connected to the bridge electrode 31 throughthe contact hole 91.

In other words, the third transistor T3 may transfer the compensatedvoltage Dm+Vth to the gate electrode G1 of the driving transistor T1 andthe second storage electrode E2 of the storage capacitor Cst through thelower gate connector 54 and the bridge electrode 31.

Hereinafter, a pixel of an organic light emitting diode displayaccording to another exemplary embodiment in which a cross-talkphenomenon is reduced by including the upper and lower gate connectors53 and 54 and the bridge electrode 31 disposed separately from the dataline 171 to replace the driving connector will be described withreference to FIG. 15 and FIG. 16 .

FIG. 15 illustrates a top plan view of still another exemplaryembodiment of a region including one pixel of an organic light emittingdiode display according to the invention, and FIG. 16 illustrates across-sectional view taken along line XVI-XVI′ of FIG. 15 .

Referring to FIG. 15 , the bridge electrode 31 is disposed so as tocross the scan line 151 and is disposed in parallel with the data line171. In addition, the bridge electrode 31 may be disposed to overlap anextension of the driving voltage line 172.

The bridge electrode 31 is disposed so as to extend from a centralportion of the Ω-type semiconductor layer 130 of the driving transistorT1 and through the second electrode D3 of the third transistor T3 in thesecond direction D2. The bridge electrode 31 overlaps the first gateelectrode 155, the storage electrode 126, and a portion of the scan line151, and a first end of the extended bridge electrode 31 may be disposedto be bent so as to not overlap the semiconductor layer 130. Accordingto another exemplary embodiment, if the semiconductor layer 130 isU-shaped, the bridge electrode 31 may be disposed to have a shortlength.

The upper gate connector 53 and the lower gate connector 54 overlap eachother in one region of the bridge electrode 31.

The upper gate connector 53 overlaps the bridge electrode 31, a portionof the lower gate connector 54, and the drain region 130 d 3 of thethird transistor T3.

The lower gate connector 54 overlaps a portion of the upper gateconnector 53, and the first end of the bridge electrode 31, but does notoverlap the semiconductor layer 130.

The bridge electrode 31 is connected to the first gate electrode 155through the contact hole 91.

The upper gate connector 53 is connected to the lower gate connector 54through a contact hole 96, and is connected to the drain region 130 d 3through a contact hole 97.

The lower gate connector 54 is connected to the bridge electrode 31through the contact hole 94.

As such, the bridge electrode 31 connects the first gate electrode 155of the driving transistor T1 and the drain region 130 d 3 of the thirdtransistor T3 through the upper and lower gate connectors 53 and 54.

Hereinafter, a structure in which the bridge electrode 31 is connectedto the first gate electrode 155 of the driving transistor T1 and thedrain region 130 d 3 of the third transistor T3 will be described indetail with reference to a cross-sectional view of FIG. 16 .

Referring to FIG. 16 , the organic light emitting diode displayaccording to another exemplary embodiment includes the bridge electrode31 on the barrier layer 110. A buffer layer 120 is disposed on thebridge electrode 31 so as to cover the bridge electrode 31.

A semiconductor layer 130 including a drain region 130 d 3 indicatingthe second electrode D3 of the third transistor T3 and a channel 130 a 1of the driving transistor T1 is disposed on the buffer layer 120.

A first gate insulating layer 140 covering the semiconductor layer 130is disposed on the semiconductor layer 130.

The first gate electrode 155 of the driving transistor T1, the scan line151, and the lower gate connector 54 are disposed on the first gateinsulating layer 140.

The lower gate connector 54 is disposed to overlap the drain region 130d 3 of the third transistor T3 and the bridge electrode 31.

The upper gate connector 53 is disposed on the third gate insulatinglayer 170, and overlaps the lower gate connector 54, the drain region130 d 3 of the third transistor T3, and the bridge electrode 31.

The upper gate connector 53 is connected to the drain region 130 d 3 ofthe third transistor T3 through the contact hole 97, and is connected tothe lower gate connector 54 through the contact hole 96. In addition,the lower gate connector 54 is connected to the bridge electrode 31through the contact hole 94, and the bridge electrode 31 is connected tothe first gate electrode 155 through the contact hole 91.

In other words, the third transistor T3 may transfer the compensatedvoltage Dm+Vth to the gate electrode G1 of the driving transistor T1 andthe second storage electrode E2 of the storage capacitor Cst through theupper gate connector 53, the lower gate connector 54, and the bridgeelectrode 31.

The organic light emitting diode display according to the presentexemplary embodiment may connect the third transistor T3 and the drivingtransistor T1 even by using the upper gate connector 53 only at a shortregion, so as to reduce parasitic capacitance existing between the dataline 171 and the upper gate connector 53.

In addition, since the data line 171 is disposed remotely from thebridge electrode 31 with the first, second, and third gate insulatinglayers 140, 160, and 170 and the first, second, and third gateconductors therebetween, a value of the parasitic capacitance existingbetween the data line 171 and the bridge electrode 31 becomes small.Accordingly, an influence of the voltage change of the data line 171 onthe voltage of the driving gate node Q of the driving transistor T1 isreduced, and the driving current Id flowing through the organic lightemitting diode OLED is constantly maintained, so that there is almost nochange in the luminance of the organic light emitting diode display bythe influence of the voltage change of the data line 171 on the voltageof the driving gate node Q of the driving transistor T1.

In the organic light emitting diode display according to the exemplaryembodiment illustrated in FIG. 15 and FIG. 16 , after forming the bridgeelectrode 31 at an upper portion of the barrier layer 110, the gateconnector 54 may be disposed when the first gate conductor is disposed,and the driving connector may be disposed when the data conductor isdisposed, and thus it is possible to provide an organic light emittingdiode display in which the cross-talk is reduced without using anadditional mask process.

While this invention has been described in connection with what ispresently considered to be practical exemplary embodiments, it is to beunderstood that the invention is not limited to the disclosed exemplaryembodiments, but, on the contrary, is intended to cover variousmodifications and equivalent arrangements included within the spirit andscope of the appended claims.

<Description of Symbols> 100: substrate 110: barrier layer 120: bufferlayer 126: storage electrode 127: initialization voltage line 130:semiconductor layer 140: first gate insulating layer 160: second gateinsulating layer 170: third gate insulating layer 180: interlayerinsulating layer 151: scan line 152: previous stage scan line 153: lightemission control line 155: first gate electrode 156: gate connector 158:bypass control line 171: data line  31: bridge electrode 50, 51, 52:first, second, third connector

While this invention has been described in connection with what ispresently considered to be practical exemplary embodiments, it is to beunderstood that the invention is not limited to the disclosed exemplaryembodiments. On the contrary, it is intended to cover variousmodifications and equivalent arrangements included within the spirit andscope of the appended claims.

What is claimed is:
 1. An organic light emitting diode display comprising: a substrate; a scan line disposed on the substrate; a data line disposed and which crosses the scan line; a driving voltage line disposed in parallel with the data line and which overlaps a plurality of transistors in a plan view; a driving transistor which has a first gate electrode and a first electrode connected to the driving voltage line; an organic light emitting diode connected to the driving transistor; a second transistor connected to the scan line, the data line, and the first electrode of the driving transistor; and a third transistor which includes a third gate electrode connected to the scan line and a second electrode connected to the first gate electrode, wherein the first gate electrode of the driving transistor and the second electrode of the third transistor are connected through a bridge electrode, and the driving voltage line overlaps the bridge electrode in the plan view.
 2. The organic light emitting diode display of claim 1, further comprising: a first storage electrode connected to the driving voltage line; and a second storage electrode which includes the first gate electrode, wherein the first storage electrode and the second storage electrode overlap each other in the plan view and constitute a storage capacitor.
 3. The organic light emitting diode display of claim 1, further comprising: an upper gate connector which overlaps the bridge electrode and the second electrode of the third transistor in the plan view, wherein the upper gate connector is physically connected to the bridge electrode and the second electrode of the third transistor through a contact hole.
 4. The organic light emitting diode display of claim 1, further comprising: a lower gate connector which overlaps the bridge electrode and the second electrode of the third transistor in the plan view, wherein the lower gate connector is physically connected to the bridge electrode and the second electrode of the third transistor through a contact hole.
 5. The organic light emitting diode display of claim 1, wherein the driving voltage line is not overlapped with the bridge electrode in the plan view. 